IMPLEMENTATION OF THE FFT PROCESSOR USING FPGA

Abstract

The Fast Fourier Transform (FFT) is a computationally intensive digital signal processing function widely used in applications such as imaging, software defined radio, wireless communication, instrumentation and machine inspection. Historically, this has been a relatively difficult function to implement optimally in hardware, leading many software designers to use digital signal processors (DSPs) in soft implementations. Unfortunately, because of the function's computationally intensive nature, such an approach typically requires multiple DSPs within the system to support the processing requirements. This is costly from a device and board real-estate perspective. Field-programmable gate array (FPGA) have become an extremely cost-effective means of off-loading computationally intensive algorithms to improve overall system performance. The FFT processor implementation on FPGA that utilizes dedicated hardware multiplier resources can cost effectively achieve application-specific integrated circuit (ASIC)-like performance while reducing development time, cost and risks. In this thesis 16-point FFT processor has been designed and implemented. The design is based on a decimation-in-frequency radix-4 algorithm and employs in-place computation to optimize memory usage. In order to operate the processor, data must first be loaded into the internal RAM. The processor is then instructed to compute the FFT, overwriting the input data in the RAM with the results. Upon completion of the FFT, the results may be read out from the RAM via the output data port. The design specifications for the FFT processor are laid down using radix-4 algorithm. It is capable of computing one butterfly computation every 40ns thus it can compute 16-complex point FFT in 1300ns including data input and output processes. The chip is operating with a clock frequency of 100MHz. The FFT processor is designed and tested according to the design specifications with the help of ISE (Integrated Software Environment) provided by Xilinx. The designed FFT processor has been implemented in Xilinx Spartan-II FPGA.