Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/13151
Title: SIMULATION OF STATIC SYNCHRONOUS S.ERiES COMPENSATOR USING DIFFERENT INVERTER TOPOLOGIES
Authors: M., Srikanth Reddy
Keywords: ELECTRICAL ENGINEERING;STATIC SYNCHRONOUS SERIES COMPENSATOR;DIFFERENT INVERTER TOPOLOGIES;GATE-TURN-OFF THYRISTOR
Issue Date: 2007
Abstract: This thesis describes about an active approach to the series line compensation, in which a synchronous voltage source implemented by a gate-turn-off thyristor (GTO) based voltage-sourced inverter, is used to provide controllable series compensation. This compensator called static synchronous series compensator (SSSC) can provide controllable compensating voltage. It is immune to classical resonance. In this thesis, static synchronous series compensator (SSSC), for the control of active power flow on a transmission line is proposed and its effective ness is investigated through multi-pulse and multi-level inverters. The SSSC is based on injecting a voltage in given line to counter the voltage drop produced by the inductive reactance of the line. The resulting compensator therefore emulates the control of transmission line reactance and thus it assist in controlling the power transmission capability. The three-phase output voltage of the multi-pulse and multi-level inverter is synchronized to the line frequency and its phase is arranged in quadrature with the line current. Multi-pulse (12-pulse and 48-pulse) inverters are designed by using different, transformer connections. The output voltage of the 48-pulse inverter is sinusoidal and contains fewer harmonics. The SSSC is simulated by using Multi-pulse (12-pulse and 48 —pulse) inverters. Multi-level voltage source inverters are emerging as a new breed power converter option for high-power applications. The multi-level voltage source converters typically synthesize the staircase voltage waveform with several levels of dc capacitor voltage. In this thesis, the SSSC is simulated by using Diode-clamped multilevel inverter. The proposed Multi-pulse (12-pulse and 48 pulse) and Multilevel (Diode-clamped) SSSC is simulated by using PSCAD/EMTDC software to validate its working and testing. It is effective to dynamically control active power change in the transmission line.
URI: http://hdl.handle.net/123456789/13151
Other Identifiers: M.Tech
Research Supervisor/ Guide: Pillai, G. N.
metadata.dc.type: M.Tech Dessertation
Appears in Collections:MASTERS' THESES (Electrical Engg)

Files in This Item:
File Description SizeFormat 
G13076.pdf2.8 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.