Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/11889
Title: DESIGN AND IMPLEMENTATION OF INTRUSION DETECTION SYSTEM WITH FPGA
Authors: Kumar, Arun
Keywords: ELECTRONICS AND COMPUTER ENGINEERING;FPGA;INTRUSION DETECTION SYSTEM;NETWORK ENVIRONMENT
Issue Date: 2008
Abstract: In this work design and implementation of Intrusion Detection System (IDS) with Field Programmable Gate Array (FPGA) is presented. Today's network security systems require high-performance as well as good functionality with the growing speed of the internet. But most'of the software-based Network Intrusion Detection Systems (e.g. Snort) show inefficiency and even fail to perform for the faster internet. We have presented a fully hardware based system to overcome these shortcomings of software-based solutions. By implementing complete intrusion detection system on FPGA with embedded processor, we can solve the problem of performance and it has capability of intrusion detection in multigigabit network environment.
URI: http://hdl.handle.net/123456789/11889
Other Identifiers: M.Tech
Research Supervisor/ Guide: Joshi, R. C.
metadata.dc.type: M.Tech Dessertation
Appears in Collections:MASTERS' DISSERTATIONS (E & C)

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