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http://localhost:8081/jspui/handle/123456789/11678
Title: | PERFORMANCE EVALUATION OF FIREWALT BUILT USING A NETWORK PROCESSOR |
Authors: | Reddy, J. Hari Krishna |
Keywords: | ELECTRONICS AND COMPUTER ENGINEERING;FIREWALT BUILT;NETWORK PROCESSOR;EVALUATION |
Issue Date: | 2006 |
Abstract: | performance, flexibility, and security. The requirements for performance and flexibility have sparked the emergence of network processors; while the requirement for security has driven the generality of various network security solutions such as firewalls. In this dissertation work, a stateful packet filtering firewall is implemented using IXP2800 Network Processor. This firewall implementation involves development of receive, packet filtering and transmitting modules on the fast-path microengines. These modules are developed using microC and executed by microengines. These modules are executed using both ordered and unordered thread execution strategies. The simulation results of this firewall implementation in both ordered and unordered thread execution is taken under different network loads and tuning parameters. The simulation results show that the unordered thread execution works better than the ordered thread execution. These results are also compared with the CISCO PIX Firewall 5 installed at IIT-Roorkee |
URI: | http://hdl.handle.net/123456789/11678 |
Other Identifiers: | M.Tech |
Research Supervisor/ Guide: | Misra, Manoj |
metadata.dc.type: | M.Tech Dessertation |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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ECDG12736.pdf | 2.1 MB | Adobe PDF | View/Open |
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