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| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 2003 | STUDY OF DYNAMIC CURRENT MODE LOGIC VLSI CIRCUITS" | Singh, Rajeer | Sarkar, S. | M.Tech Dessertation |
| 2009 | A COMPARATIVE STUDY OF 61, 8T AND 9T DECANANO SRAM CELL | athe, Paridhi | Dasgupta, S. | M.Tech Dessertation |
| 2001 | DESIGN AND PERFORMANCE CHARACTERISTICS OF ADDER CHIPS | Joshi, Sanjay | Aggarwal, R. P. | M.Tech Dessertation |
| 2007 | DESIGN OF A NEW DIGITAL PLL FREQUENCY SYNTHESIZER IN 0.18 Pm CMOS TECHNOLOGY WITH LOW LOCKING TIME | Agarwal, Vinit | Saxena, A. K.; Dwiviedi, S. | M.Tech Dessertation |
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