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| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 2008 | DESIGN AND SIMULATION OF CMOS BASED DELAY LOCKED LOOP FOR MULTIPHASE CLOCK GENERATION AND ITS APPLICATION AS A PROGRAMMABLE CLOCK MULTIPLIER | Gupta, Abhay | Saxena, A. K. | M.Tech Dessertation |
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