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| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 1999 | . VLSI-CHIP FLOORPLAN AREA OPTIMIZATION BY GENETIC ALGORITHM | Gupta, Ravi Kant | Sarkar, S. | M.Tech Dessertation |
| 1999 | A STUDY _ OF MESFET TRANSCONDUCTANCE BY USING LINEARLY GRADED SUBSTRATE-CHANNEL JUNCTION. MODEL | Kumar, Dhirendra | Sarkar, S.; Agarwal, R. P. | M.Tech Dessertation |
| 1999 | A STUDY OF ZTC-OPERATING POINT OF VLSI MOSFETs | Sekhar, Murthy Chandra | Sarkar, S. | M.Tech Dessertation |
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