Search


Current filters:



Start a new search
Add filters:

Use filters to refine the search results.


Results 1-3 of 3 (Search time: 0.005 seconds).
  • previous
  • 1
  • next
Item hits:
Issue DateTitleAuthor(s)Research Supervisor/ Guide Type
1999. VLSI-CHIP FLOORPLAN AREA OPTIMIZATION BY GENETIC ALGORITHMGupta, Ravi KantSarkar, S.M.Tech Dessertation
1999A STUDY _ OF MESFET TRANSCONDUCTANCE BY USING LINEARLY GRADED SUBSTRATE-CHANNEL JUNCTION. MODELKumar, DhirendraSarkar, S.; Agarwal, R. P.M.Tech Dessertation
1999A STUDY OF ZTC-OPERATING POINT OF VLSI MOSFETsSekhar, Murthy ChandraSarkar, S.M.Tech Dessertation