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Issue Date	Title	Author(s)	Research Supervisor/ Guide	Type
2009	HIGH PERFORMANCE ADVANCE ENCRYPTION STANDARD IMPLEMENTATION ON FPGA	Patel, Vishwanath	Joshi, R. C.; Saxena, A. K.	M.Tech Dessertation
2008	DESIGN AND IMPLEMENTATION OF RECONFIGURABLE FLOATING POINT ARITHMETIC UNIT	Surekha, P. S.	Joshi, R. C.; Saxena, A. K.	M.Tech Dessertation
2009	DESIGN OF LOW POWER DIGITAL CIRCUITS AND REGISTER FILE USING ADIABATIC COMPLEMENTARY PASS-TRANSISTOR LOGIC	Daravathu, Sreenu	Saxena, A. K.	M.Tech Dessertation
2006	MERGING OF TIMING FOR DIFFERENT VOLTAGE CONDITIONS	Priya, V. Lakshmi	Goyal, vishal; Saxena, A. K.; Dasguta, S.	M.Tech Dessertation
2002	TRANSPORT PROPERTIES OF TRANSITION METAL DOPED INDIUM PHOSPHIDE	Kumar, Shailesh	Saxena, A. K.	M.Tech Dessertation
2007	DESIGN OF A NEW DIGITAL PLL FREQUENCY SYNTHESIZER IN 0.18 Pm CMOS TECHNOLOGY WITH LOW LOCKING TIME	Agarwal, Vinit	Saxena, A. K.; Dwiviedi, S.	M.Tech Dessertation
2007	FPGA IMPLEMENTATION OF MEMORY-SPEED OPTIMIZED ARCHITECTURE OF 2-D DWT FOR IMAGE COMPRESSION APPLICATIONS	Bansal, Sudhakar	Saxena, A. K.	M.Tech Dessertation
2009	DESIGN AND SIMULATION OF 32 BIT ALU BASED ON FEEDBACK SWITCH LOGIC	Prakash, Patanjali	Saxena, A. K.	M.Tech Dessertation
2007	DESIGN AND SIMULATION OF LOW JITTER PHASE LOCKED LOOP COMPONENTS	Paliwl, Abhishek	Saxena, A. K.	M.Tech Dessertation
2007	DESIGN OF OP-AMP FOR ANALOG TO DIGITAL CONVERTERS	Bojedla, Naresh Babu	Saxena, A. K.	M.Tech Dessertation