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Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
---|---|---|---|---|
2008 | DESIGN OF SWITCHED CAPACITOR BASED LOW PASS SIGMA DELTA MODULATOR | Patluri, Bindu | Saxena, A. K.; Dasgupta, S. | M.Tech Dessertation |
2008 | IMPLEMENTATION OF FLOATING POINT AND LOGARITHMIC NUMBER SYSTEM ARITHMETIC UNITS AND THEIR COMPARISON FOR FPGA | Kumar, Amit | Saxena, A. K. | M.Tech Dessertation |
2008 | DESIGN AND SIMULATION OF CMOS BASED DELAY LOCKED LOOP FOR MULTIPHASE CLOCK GENERATION AND ITS APPLICATION AS A PROGRAMMABLE CLOCK MULTIPLIER | Gupta, Abhay | Saxena, A. K. | M.Tech Dessertation |
2008 | FPGA BASED "PARALLEL IMPLEMENTATION OF DWT FOR IMAGE COMPRESSION | Kumar, K. Prashanth | Joshi, R. C.; Saxena, A. K. | M.Tech Dessertation |
2008 | DESIGN AND IMPLEMENTATION OF RECONFIGURABLE FLOATING POINT ARITHMETIC UNIT | Surekha, P. S. | Joshi, R. C.; Saxena, A. K. | M.Tech Dessertation |
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