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Shodhbhagirathi @ IITR
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ELECTRONICS AND COMMUNICATION ENGINEERING (FORMERLY ELECTRONICS & COMPUTER ENGINEERING)
MASTERS' THESES (E & C)
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Results 1-10 of 14 (Search time: 0.012 seconds).
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Issue Date
Title
Author(s)
Research Supervisor/ Guide
Type
2002
LAY-OUT DESIGN OF ENCODER AND DECODER CHIP FOR MOBILE APPLICATIONS
Kumar, Satyendra
Joshi, R. C.; Sarkar, S.
M.Tech Dessertation
2003
STUDY OF DYNAMIC CURRENT MODE LOGIC VLSI CIRCUITS"
Singh, Rajeer
Sarkar, S.
M.Tech Dessertation
2003
CHIP LEVEL DESIGN OF 4-BIT UNIVERS. SHIFT REGISTER
Venugopal, N.
Sarkar, S.
M.Tech Dessertation
2004
A STUDY OF VOLTAGE SCALING EFFECTS AND HIGH SPEED TECHNIQUES IN DYCML CIRCUITS
Thirupathi, Ch
Sarkar, S.
M.Tech Dessertation
2003
MICROCONTROLLER DESIGN
Lohiya, Gaurav
Padma, D.; Sarkar, S.
M.Tech Dessertation
2005
AN ANALYTICAL STUDY OF DYNAMIC LOGIC CIRCUITS FOR VLSI. APPLICATIONS
Raju, Navan Ramesh
Sarkar, S.
M.Tech Dessertation
2003
DESIGN OF SIGNAL STATUS MONITORING CHIP
Verma, Avanish
Sarkar, S.
M.Tech Dessertation
2004
ARCHITECTURE DESIGN AND FPGA IMPLEMENTATION OF AN IMAGE ENHANCEMENT SYSTEM
Jain, Sachin Kumar
Sarkar, S.
M.Tech Dessertation
2005
MINIMIZATION OF POWER DISSIPATION IN REPEATER LOADED RLC INTERCONNECTS
Puli, Pratap
Sarkar, S.
M.Tech Dessertation
2005
EFFECTS OF SCALING ON DOUBLE GATE MOSFET
Sharma, Piyush
Sarkar, S.
M.Tech Dessertation
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Author
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Bisht, Rajani
1
Dutta, Arindam
1
Jain, Sachin Kumar
1
Kumar, Satyendra
1
Lohiya, Gaurav
1
Puli, Pratap
1
Raju, Navan Ramesh
1
Sharma, Piyush
1
Singh, Rajeer
1
Thirupathi, Ch
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Subject
1
4-BIT PROCESSOR UNIT
1
ARCHITECTURE DESIGN
1
BUFFER SYSTEM
1
CHIP LEVEL DESIGN
1
CMOS BUFFERS
1
CMOS INVERTER
1
CMOS TECHNOLOGY
1
CMOS-REPEATERS
1
DIGITAL SYSTEMS
1
DYNAMIC CURRENT MODE LOGIC VLSI C...
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Date issued
4
2003
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2005
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2002
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2004
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2000
Research Supervisor/ Guide
1
Agarwal, R. P.
1
Joshi, R. C.
1
Padma, D.
Has File(s)
14
true