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Shodhbhagirathi @ IITR
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ELECTRICAL ENGINEERING
MASTERS' THESES (Electrical Engg)
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Results 1-9 of 9 (Search time: 0.01 seconds).
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Issue Date
Title
Author(s)
Research Supervisor/ Guide
Type
1996
SIMULATION STUDIES OF SYSTEMS WITH AUTO TUNED CONTROLLER
Kumar, Ajay
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2006
FPGA BASED FLOATING POINT PROCESSOR
Prabhu, Sanjay
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2006
IMPLEMENTATION OF FIR FILTER IN FPGA
Kumar, Devara Dilip
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2006
IMPLEMENTATION OF MPEG SYSTEM FOR IMAGE PROCESSING USING FPGA
Tak, Prashant
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
1999
INTRANET FOR CORPORATE JOB
Jha, Priya Ranjan
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2005
IMPLEMENTATION OF THE FFT PROCESSOR USING FPGA
Reddy, M. Naveen Kumar
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2005
FPGA BASED DESIGN OF ON-CHIP PERIPHERAL (OPB) BUS BRIDGES FOR MULTIMEDIA APPLICATIONS
Kundu, Parveen
Vasantha, M. K.; Gupta, Indra
M.Tech Dessertation
2006
16 - BIT RISC PROCESSOR DESIGN USING VIDE
Mane, Pravin Sakharam
Gupta, Indra; Vasantha, M. K.
M.Tech Dessertation
2000
DYNAMIC SIMULATION OF BINARY DISTILLATION PROCESS
Chandramouly, Vengala
Gupta, Indra; Vasantha, M. K.
M.Tech Dessertation
Discover
Author
1
Chandramouly, Vengala
1
Jha, Priya Ranjan
1
Kumar, Ajay
1
Kumar, Devara Dilip
1
Kundu, Parveen
1
Mane, Pravin Sakharam
1
Prabhu, Sanjay
1
Reddy, M. Naveen Kumar
1
Tak, Prashant
Subject
4
FPGA
1
16 - BIT RISC PROCESSOR DESIGN
1
AUTO TUNED CONTROLLER
1
BINARY DISTILLATION PROCESS
1
CORPORATE JOB
1
DISTILLATION COLUMN
1
DYNAMIC SIMULATION
1
FAST FOURIER TRANSFORM
1
FFT PROCESSOR
1
FIR FILTER
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Date issued
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2006
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1996
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1999
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2000