Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/10175
Full metadata record
DC FieldValueLanguage
dc.contributor.authorKumar, S. R. Sunil-
dc.date.accessioned2014-11-23T06:43:24Z-
dc.date.available2014-11-23T06:43:24Z-
dc.date.issued1991-
dc.identifierM.Techen_US
dc.identifier.urihttp://hdl.handle.net/123456789/10175-
dc.guideGupta, J. P.-
dc.guideKumar, Padam-
dc.description.abstractFuture generation of computers are aimed to achieve increased performance by exploiting the inherent parallelism existing in the problem and using a large number of cheap microprocessor chips available through VLSI technology. Declarative languages based on lambda calculus are known as Functional Languages. They allow parallel evaluation in a natural manner and lack the notion of assignment. These languages can be used to program a large number of chips with no side effects introduced. Functional Languages are the probable candidates for future generation computers based on Parallel Processing. The implementation of functional languages on sequential machines has been the topic of recent interest. The high-level functional languages are first translated into lambda calculus and then implemented using Graph Reductions. Beta reduction is the basic evaluation rule of lambda calculus, which may either follow normal-order or applicative order of graph reduction. Beta reduction results in inefficient implementation of lambda expressions.en_US
dc.language.isoenen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectIBM-PCen_US
dc.subjectG-MACHINEen_US
dc.subjectHIGH LEVEL LANGUAGEen_US
dc.titleG-MACHINE IMPLEMENTATION ON AN IBM-PCen_US
dc.typeM.Tech Dessertationen_US
dc.accession.number246139en_US
Appears in Collections:MASTERS' THESES (E & C)

Files in This Item:
File Description SizeFormat 
ECD246139.pdf2.65 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.