http://localhost:8081/jspui/handle/123456789/115 2026-10-16T14:41:52Z 2026-10-16T14:41:52Z Nariya, Drashtiben Madhavjibhai http://localhost:8081/jspui/handle/123456789/21637 2026-09-21T10:28:43Z 2023-05-01T00:00:00Z

Title: Parallel Converter Fed High-Performance PMSM Drive with Reduced Circulating Current Meant for High-Speed Applications Authors: Nariya, Drashtiben Madhavjibhai Abstract: High-speed permanent magnet synchronous motor (PMSM) drives are preferred for high-speed electric vehicle applications due to their high power density and efficiency. This project aims to enhance drive performance by reducing peak-peak torque ripple and total harmonic distortion (THD) in motor line current over the entire range of frequency. In this project, two parallel converter-fed permanent magnet synchronous motor drives are proposed and it is compared with the single converter-based Stan dard PMSM drive. Standard PMSM drive consists of a voltage source inverter (VSI) feeding a permanent magnet synchronous motor operated in vector control mode. Such motor drives operate at a fundamental frequency of more than 750 Hz and power levels ranging up to a few tens of kW (≥ 50 kW). The rated speed for PMSM used in the standard PMSM drive is 5500 rpm. High-speed operations result into high switching frequency for the inverter which can lead to switching energy losses reducing the efficiency of the drive and deteriorating the thermal performance of the drive. To restrict switching energy losses, the switching frequency is restricted below 10 kHz for standard PMSM drive. Thus, the pulse number (i.e., the ratio of switch ing frequency and fundamental frequency) drops below 15 over moderate and high fundamental frequency operation. Consequently, drive performance deteriorates sig nificantly in terms of total harmonic distortion in line current and peak-peak torque ripple. This project proposes parallel converter-based PMSM drive-I to improve mo tor line current THD and peak to peak torque ripple through carrier interleaving. Through carrier interleaving, the optimum interleaving angle can be analyzed which can reduce torque ripple significantly. An optimized interleaving angle is identified to confine high frequency circulating current within ratings of power converter while maintaining nearly minimum THD in motor line current. Operation of converters in parallel produces high circulating current which can increase energy losses in the drive. Thus, the performance of the drive deteriorates when operated for longer durations. To achieve a reduction in circulating current flowing between converters without compromising on line current THD and torque ripple, this project further proposes coupled inductors based PMSM drive-II. Proposed PMSM drive-II also uses vector control for the drive operation. Value for the coupled inductor is chosen in such a way that both the proposed PMSM drives can be fairly compared in terms of circulating current while maintaining the same motor line current THD and peak to peak torque ripple as the proposed drive-I. The performance of proposed PMSM drives I and II are compared with the standard PMSM drive in terms of line current THD and peak to peak torque ripple. Simulation results pertaining to three-phase, 50 kW, and 916 Hz PMSM drive are presented in the report to validate the propositions. A Trial version of plecs software is used to generate the results.

2023-05-01T00:00:00Z Tejdeep, Gullapalli http://localhost:8081/jspui/handle/123456789/21636 2026-09-21T10:28:05Z 2023-05-01T00:00:00Z

Title: SWITCHING LOOKUP TABLE-BASED DIRECT POWER CONTROL OF AC/DC CONVERTERS Authors: Tejdeep, Gullapalli Abstract: Traditional diode and thyristor-based line-commutated rectifiers in the grid connected power systems are causing several problems in transmission and distribution systems due to excessive current harmonics and reactive currents injected back into the grid. As a result, line commutated DBRs are being substituted with three-phase PWM VSCs in utility-based applications. The term pulse width modulated voltage source converter (PWM-VSC), which is used in this dissertation, is also known as an AC-DC converter. In the case of an islanded grid structure, which is usually a weak grid that has less inertia compared to a stiff grid. To, operate a multifunctional PWM converter which can replace the passive filters, provide reactive support to the grid etc in such weak grid system where the PCC is not usually at UPF, there is a need to analyse for operating conditions other than UPF. The primary goal of power conversion control in a power electronic system is to develop control techniques with maximum hardware utilization and better power quality. To achieve better power quality, minimisation of harmonic distortions and switching losses is necessary. The Direct Power Control (DPC) is one of the well-known methods in the case of AFE-VSCs, which originates from direct torque control (DTC) of AC machines. Switching lookup table is the vital component of this control technique. Hence, it is extremely important for in depth investigations, analysis of LUTs for better DPC performance. In this report first, existing VOC and DPC schemes are described based on the literature review with more focus on DPC methods. Later, mathematical or power model of 2L-VSC is examined. And finally, three phase 2L-VSC model is created using MATLAB-Simulink and performance study of several switching tables in the existing literature has been done at different power factor conditions. For hardware results and testing dSPACE1104 controller was used and dSPACE ControlDesk software was used for visualization of the results.

2023-05-01T00:00:00Z Kumar, Saurav http://localhost:8081/jspui/handle/123456789/21635 2026-09-21T10:27:27Z 2023-05-01T00:00:00Z

Title: NVESTIGATION OF VARIOUS DTC SCHEMES FOR PMSM DRIVE Authors: Kumar, Saurav Abstract: The Permanent magnet synchronous motors (PMSM) drives use direct torque control (DTC). PMSMs are finding several industrial uses due to their excellent power density and efficiency, including hybrid electric vehicles. PMSMs are employed where quick torque response and high performance operation of the machine are required. This study analyses an SVPWM inverter-based direct torque control (DTC) system with PI and SMC for reducing flux and torque ripple in PMSM drives. The analysis demonstrates that the electromagnetic torque increases as the angle between the stator and rotor flux linkages increases. Hence, increasing the stator flux linkage's rotating speed achieves a fast torque response. The DTC method is distinct from approaches that regulate the motor torque and flux values using current controllers in a suitable reference frame. The DTC method does not use any of the present controllers. Based on the difference between the desired and obtained torque and flux values. DTC regulates the voltage source inverter states. One of the six voltage vectors obtained by the inverter (VSI) is chosen to have torque and flux oscillations between the boundaries of two hysteresis bands. This technique uses two- and three-level hysteresis comparators to regulate stator flux and electromagnetic torque. To improve dynamic reaction time and increase robustness during loading and motor parameter variation, an SMC based controller is designed that maintains the increment of motor speed and torque angle. The PMSMs' robustness is increased using the sliding mode controller, which has a solid static and dynamic response, reduces the motor's speed drop, and improves disturbance rejection. The simulation results demonstrated the effectiveness of the SMC-DTC approach. First, a PMSM's properties and operating principles are described. Next, various coordinate systems' mathematical representations of a PMSM are examined. A PMSM is created using MATLAB/Simulink and based on the αβ-reference frame to validate the model. Finally, we compared the results of the two models' simulations to obtain the torque ripple responses for DTC and SMC-DTC.

2023-05-01T00:00:00Z Kumar, Kondaguduru Uday http://localhost:8081/jspui/handle/123456789/21634 2026-09-21T10:27:15Z 2023-05-01T00:00:00Z

Title: COMMUTATION TORQUE RIPPLE REDUCTION IN BLDC MOTOR Authors: Kumar, Kondaguduru Uday Abstract: Brushless DC motors are used in many applications because of their high efficiency, less maintenance, and long lifespan. However, one of the main disadvantages of the BLDC motor is its torque ripple. Due to this ripple, there will be more noise and vibrations, less efficiency, and less lifespan. To resolve this issue, researchers have provided many techniques. One of the Techniques is to boost the voltage during the commutation, which can help to reduce the Torque ripple in the machine to run it smoothly. During the commutation, the voltage applied to the motor is switched from one phase to another to have a continuous attraction force. So that the motor will rotate continuously, by increasing the voltage above the rated voltage, we can reduce the current ripple in the machine, which will reduce the torque ripple in the machine. Due to the finite inductance of the motor, commutation requires some time to rise and fall of the currents. Differences in the time of the falling and rising currents due to the freewheeling action and Back EMF will cause a ripple in the torque. It is found that by injecting more voltage during the commutation, this torque ripple can be reduced. Simulation has been done using the 2-level inverter and the voltage modifier circuit to reduce the torque ripple. Falling and rising current slopes and time are calculated to know how much time we need to apply the modified voltage. By using this method, there will be minimal impact on the efficiency of the machine. Implemented Hardware for controlling the speed of the BLDC motor using the spartan3E FPGA board. Here Proportional integral controller is used for controlling the speed of the machine. The PI controller will receive Feedback from the speed calculated from the hall sensor signals and reference speed provided. Based on the error between the reference speed and the actual speed, the PI controller will set the pulse width division Modulation (PWM) duty cycle to control the motor speed. The FPGA is used to generate the PWM signals, measure the speed and current, implement the PI controller, and display the speed and duty cycle. FPGA offers many advantages for implementing the speed-controlling algorithm. Mainly it can perform high-speed parallel processing and enable real-time control. Hardware implementation of PI controller in FPGA gives a faster response.

2023-05-01T00:00:00Z