Shodhbhagirathi: A Repository of Theses & Dissertations of IITR
Browsing by Author Bansal, Sudhakar
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| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 2007 | FPGA IMPLEMENTATION OF MEMORY-SPEED OPTIMIZED ARCHITECTURE OF 2-D DWT FOR IMAGE COMPRESSION APPLICATIONS | Bansal, Sudhakar | Saxena, A. K. | M.Tech Dessertation |