Shodhbhagirathi: A Repository of Theses & Dissertations of IITR
Browsing by Subject CMOS
Showing results 1 to 7 of 7
| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 2010 | A COMPARATIVE STUDY OF 2N-2N2P, ECRL AND PFAL ADIABATIC LOGIC FAMILIES | Madan, Garima | Das Gupta, S.; Nath, R.; Tandon, V. K. | M.Tech Dessertation |
| 2007 | IMPLEMENTATION OF PARALLEL ADC & COMPARISON WITH OTHER ADCs | Vikas | Rai, Jagdish | M.Tech Dessertation |
| 2006 | LEAKAGE CURRENTS' REDUCTION IN SUB-MICRON DIGITAL CMOS CIRCUITS | Lalwani, Mukesh Kumar | Nath, R.; Tondon, V. K. | M.Tech Dessertation |
| 2012 | MECHANICAL STRESS AWARE GATE TIMING MODEL FOR COMBINATIONAL LOGIC CELLS | Vundavalli, Sandeep | Bulusu, Anand; Dasgupta, Sudeb | M.Tech Dessertation |
| 2007 | PERFORMANCE ANALYSIS OF FERROELECTRIC CAPACITOR BASED DAC WITH RESPECT TO CMOS CAPACITOR BASED DAC | Siripurapu, Veerabhadra Rao. | Nath, R.; Das Gupta, S. | M.Tech Dessertation |
| 2003 | TIMING ANALYSIS OF CMOS INVERTER | Agrawal, Parul | Tondon, V. K.; Sarkar, S. | M.Tech Dessertation |
| 2012 | TIMING MODEL FOR SEQUENTIAL CIRCUITS | Sharma, Arvind Kumar | Bulusu, Anand; Gupta, Sudebdas | M.Tech Dessertation |